Obviously, nobody would trust Espressif if they didn't guarantee availability of parts for n years. The existing Xtensa parts are not disappearing overnight.
I would bet the number of people who program the ESP32 and know anything much about the Xtensa ISA or care which ISA is used would be pretty small. They will be just "It's some weird ISA no none uses, but Espressif give us a compiler for it so it's fine".
Of course Cadence do license Xtensa to many of their EDA customers for use in some core that's not visible to the outside world. They support it, it's easier than dealing with ARM etc. Now there is RISC-V it's probably getting very few new customers, though Tensilica/Cadence do have a very nice system for adding custom instructions and automatically generating things such as the toolchain for them.
ESP32 is probably one of very few places where 3rd party programmers have access to an underlying Xtensa CPU.
I worked on software for some internal chip at Samsung where the documentation didn't give the ISA a name but just listed what the instructions where. "Hmmm", I thought, "there are 16 and 24 bit long instructions -- that sounds familiar". I checked, and the opcodes matched up to Xtensa. Plus a few custom ones.
I will say Xtensa is a heck of a lot better than the home-grown ISA inside FTDI products! It is not normally exposed, but they have one product, the VNC2, which 3rd parties can program. It is AWFUL. (I'm only assuming they use the same ISA in their other products, but probably...)
