I guess what I'm not seeing, and I feel this way about all circuits as code, is why this isn't just a file format spec. I appreciate the INA228 example showing that it can describe functions/constraints of the part. I've certainly made mistakes (and had reviewers catch some of them) with swapped SDA/SCL or voltages being too high. Basically, things you can't always tell from the symbol itself or won't get caught by DRC. Buuuuut, my problem with this is that it feels better suited to be a way to DRC other EDA tools.
For example, most of the .ato files are just basically netlists? https://github.com/atopile/spin-servo-drive/blob/main/elec/s... for example is just a bunch of "this connects to that". We really need a whole new for that? I feel like this could all be done with an xml or something. Maybe more modern like a yaml idk. Every one of these solutions has its own language with its own limitations, instead of using what's around first and focusing on what makes this *better* than click and drag. Because I have to say,
For example, most of the .ato files are just basically netlists? https://github.com/atopile/spin-servo-drive/blob/main/elec/s... for example is just a bunch of "this connects to that". We really need a whole new for that? I feel like this could all be done with an xml or something. Maybe more modern like a yaml idk. Every one of these solutions has its own language with its own limitations, instead of using what's around first and focusing on what makes this *better* than click and drag. Because I have to say,
> cm5.cm5.ethernet.pairs[0].n.line.override_net_name = "eth0_N"
Just cannot be easier than plopping down a net label.